1. Field of the Invention
The present invention relates in general to the field of electronics and lighting, and more specifically to a system and method to determine power factor correction control parameters from phase delays in a phase modulated signal.
2. Description of the Related Art
Commercially practical incandescent light bulbs have been available for over 100 years. However, other light sources show promise as commercially viable alternatives to the incandescent light bulb. LEDs are becoming particularly attractive as main stream light sources in part because of energy savings through high efficiency light output and environmental incentives such as the reduction of mercury.
LEDs are semiconductor devices and are driven by direct current. The lumen output intensity (i.e. brightness) of the LED approximately varies in direct proportion to the current flowing through the LED. Thus, increasing current supplied to an LED increases the intensity of the LED and decreasing current supplied to the LED dims the LED. Current can be modified by either directly reducing the direct current level to the white LEDs or by reducing the average current through duty cycle modulation.
Dimming a light source saves energy when operating a light source and also allows a user to adjust the intensity of the light source to a desired level. Many facilities, such as homes and buildings, include light source dimming circuits (referred to herein as “dimmers”).
FIG. 1 depicts a lighting system 100 that generates a link voltage VLINK and a drive current iOUT to illuminate the light source 102. An alternating current (AC) voltage source 101 such as a power plant generates a mains voltage Vmains, which provides power for lighting system 100. The particular frequency and root mean square (RMS) value of mains voltage Vmains is generally location specific and is nominally 60 Hz/120 VAC in the United States and 50 Hz/230 VAC in Europe and elsewhere. The lighting system 100 includes a dimmer 104 to generate a raw phase modulated signal VΦ—RAW. Rectifier 105 rectifies the raw phase modulated signal VΦ—RAW to generate a rectified phase modulated signal VΦ. Rectifier 105 is, for example, a full-bridge diode rectifier. The phase delay of each cycle of the phase modulated signal VΦ indicates a particular dimming level. Dimmer 104 can be any conventional dimmer that generates a phase modulated signal, such as a triac based dimmer as described in Melanson I.
The lighting system 100 also includes a light source driver circuit 106 to receive the phase modulated signal VΦ. In at least one embodiment, light source driver circuit 106 is a switching power converter with an internal PFC switch (not shown) that controls power factor correction and boosting phase modulated signal VΦ to the link voltage VLINK. The light source driver circuit 106 modulates the light source drive current iOUT in response to the dimming level indicated by phase modulated signal VΦ. The light source driver circuit 106 modulates the light source drive current iOUT by turning the light source drive current iOUT “on” and “off” to achieve an average value of light source drive current iOUT corresponding to the dimming level indicated bad phase modulated signal VΦ. The drive current iOUT causes the light source 102 to illuminate, and modulating the drive current iOUT varies the brightness of light source 102. Thus, light source driver circuit 106 attempts to modulate the drive current iOUT so that light source 102 dims to a level indicated by phase modulated signal VΦ.
For an LED based light source 102, the link voltage VLINK can be 400 V or more. To dim light source 102, light source driver circuit 106 decreases the duty cycle of control signal CS and, thus, decreases the drive current iOUT. When dimmed, the power demand of light source 102 decreases. When the power demand of light source 102 decreases, light source driver circuit 106 decreases the duty cycle of the internal switch (not shown) that controls the voltage boost of phase modulated signal VΦ to link voltage VLINK. Despite decreasing power demand, light source driver circuit 106 maintains the link voltage VLINK at an approximately constant level. The switching efficiency of light source driver circuit 106 steadily decreases as 106 continues to boost the link voltage VLINK to a voltage used during full power demand by light source 102 despite the lower power demands of a dimmed light source 102. The efficiency loss becomes more prominent, for example, when a duty cycle of the internal PFC switch of light source driver circuit 106 is less than 50%.
Decreasing power demand by light source 102 when dimming light source 102 can actually increase power demand by light source driver circuit 106. Light source driver circuit 106 attempts to provide unity power factor correction so that the light source driver circuit 106 appears resistive to the AC voltage source 101. Thus, looking into terminals A and B, ideally light source driver circuit 106 has an effective resistance REFF—0 as perceived by the AC voltage source 101. The value of the effective resistance REFF—0 equals VΦ/iIN, where VΦ is a phase modulated signal and iIN is the input current into light source driver circuit 106. As the power demand by light source 102 decreases when dimmed, the current iIN actually increases, thus, decreasing the effective resistance REFF—0, thus, drawing more power from AC voltage source 101. Decreasing the effective resistance REFF—0 of light source driver circuit 106 when dimming light source 102 represents an inefficient use of power.
FIG. 2A depicts a series of voltage waveforms 200 that represent two respective cycles of waveforms present in lighting system 100. Supply voltage Vmains is a sine wave depicted with two exemplary cycles 202 and 204. Dimmer 104 generates a raw phase modulated signal VΦ by chopping each half cycle of supply voltage Vmains to generate identical leading edge phase delay α1 for each respective half cycle of cycle 206. The phase delays of the raw phase modulated signal VΦ increase as the dimming level decreases, i.e. the brightness of light source 102 decreases. Half cycle 208 indicates longer phase delays α2 corresponding to a decrease in dimming level. The leading edge phase delays αX represent the elapsed time between a beginning of a half cycle and a leading edge of the phase modulated mains voltage VΦ, where X is an index value. The rectified cycles 210 and 212 of phase modulated signal VΦ have the same respective phase delays α1 and α2 as the raw phase modulated signal VΦ RAW.
Conventional dimmers, such as a triac based dimmer, that are designed for use with inactive loads, such as incandescent light bulbs, often do not perform well when supplying a raw phase modulated signal VΦ—RAW to an active load such as light source driver circuit 106. For example, when supplying an active load, the dimmer can miss generating phase delays in some cycles of raw phase modulated signal VΦ—RAW and can generate ripple during the phase delays. Exemplary problems with at least one conventional dimmer when used with an active load are described in Rand et al., “Issues, Models and Solutions for Triac Modulated Phase Dimming of LED Lamps”, June, 2007, pages 1398-1404 of Power Electronics Specialists Conference, 2007. PESC 2007, published by the Institute of Electrical and Electronic Engineers, ISBN 978-1-4244-0655-5.
FIG. 2B depicts an LED driver circuit 250 available from Supertex, Inc. of Sunnyvale, Calif., USA. LED driver circuit 250, represents one embodiment of light source driver circuit 106. The LED driver circuit 250 is described in more detail in Supertex design note DN-H05 available from Supertex, Inc. The LED driver circuit 250 includes two extra circuits, damper circuit 252 and bleeder circuit 254 to provide compatibility with a dimmer, such as dimmer 104. According to DN-H05, the damper circuit 252 provides damped charging of the driver's input filter circuit at P16. The damper circuit 252 provides resistive damping to prevent AC line input current oscillations due to a sudden rise of an AC line voltage, such as the edges of phase modulated signal VΦ. The bleeder circuit 254 provides a nominal 1 kohm load to a rectified AC line at P21 to suppress a voltage rise at the input capacitors C21-C23 during phase delays of phase modulated signal VΦ which could otherwise cause flicker of a lamp driven bid LED driver circuit 250.
FIG. 2C depicts a unity power factor LED lamp driver 280, which represents one embodiment of light source driver circuit 106. The LED lamp driver 280 is described in more detail with reference to FIG. 9 in Supertex application note AN-H52 available from Supertex, Inc. LED lamp driver 280 includes damping circuitry 282 to add a load to dimmer 104 during phase delays of phase modulated signal. The damping circuitry 282 includes a bleeder resistor RBL that is connected by transistor M2 during phase delays of a phase modulated input signal to lamp driver 280. When transistor M2 conducts, the bleeder resistor RBL provides an added load to the AC line at VIN to dampen the phase modulated signal during phase delays. Adding an extra transistor M2 and resistor RBL increases the system cost of lamp driver 280.
The light source driver circuit 106 exhibits one or more inefficiencies when dimming light source 102. For example, when the power demand by light source 102 decreases, the link voltage remains approximately constant. Additionally, when power demand by light source 102 decreases, the effective resistance REFF—0 of light source driver circuit 106 increases, thus drawing more power from AC voltage source 101 despite the lower power demands by light source 102. Additionally, added circuitry to conventional LED driver circuits adds cost to the LED driver circuits.